FAQ
- FAQ for System
- FAQ for Low Power
- 1. Why does the system still not go to sleep when I configure Sleep mode?
- 2. Does the system not go to sleep after a UART call
app_uart_receive_async? - 3. J-Link connection failed, SK board cannot download firmware, why?
- 4. The wake-up time is not set in the program, and the Bluetooth is not turned on. After directly entering the sleep mode, why does it wake up automatically every 30 seconds?
- 5. J-Log is no longer output after a part of Log is output in the Link RTT Viewer. Why?
- FAQ for Memory
- FAQ for Fault Trace
- 1. How can I tell if my program is a HardFault?
- 2. Why does my program get HardFault?
- 3. Can I analyze the above without using the Cortex Backtrace component?
- 4. If you don’t use the Fault Trace module, can you analyze HardFault?
- 5. What’s going on when the PC points to an inexplicable place?
- 6. What if I can’t read the data on the stack?
- FAQ for LOG Module
- 1. What is the maximum baud rate of UART for LOG?
- 2. What should I do if I can’t see the output on the computer when I use the serial port to type LOG?
- 3. How to type LOG with SEGGER RTT?
- 4. Why does RTT print the log for a period of time and then stop printing, and the system is stuck?
- 5. What should I do if I can’t see the LOG after J-Link RTT Viewer is connected?
- 6. How to export the stored LOG?
- 7. When using GRToolbox to export the storage LOG, what should I do if the LOG is incomplete?
- 8. When using GRToolbox to export logs, I find that only the most recent logs are available, and I can’t get earlier logs. What should I do?
- FAQ for Low Power
- FAQ for Peripherals
- I/O
- FAQ for I/O
- 1. How to deal with the problem of high sleep power consumption due to IO leakage (how to properly configure and detect IOs before sleep)?
- 2. How to deal with IO interrupt loss?
- 3. Does IO have push-pull output mode?
- 4. What is the reason for the large frequency error when outputting a square wave using IO flip-flop?
- FAQ for I/O
- ADC
- FQA for ADC
- 1. Calling the asynchronous acquisition interface keeps failing to generate a completion interrupt
- 2. Some of the internal reference voltage stalls are captured with large errors in the results
- 3. High sampling rate with large error in the result.
- 4. Slow Asynchronous Acquisition Interface
- 5. Synchronous capture interface fails to generate data
- FQA for ADC
- DMA
- I2C
- I2S
- QSPI
- FAQ for QSPI
- 1. What is the maximum frequency supported by QSPI?
- 2. QSPI Operation Mode Introduction
- 3. What is the reason for data end-sequence exception when using Memory Map mode to access external Flash?
- 4. Using traditional API interface (non-Memory Map mode) to read external Flash, the data does not match the desired data endian order.
- 5. How to support QSPI module to use Memory Map mode to access Flash larger than 16 MB 4-byte address?
- 6. Accessing Flash using the QSPI sample project from the SDK fails, why?
- 7. What are the reference programs for the QSPI peripheral?
- FAQ for QSPI
- SPI
- Timer
- FAQ for GPTimer
- 1. What is the difference between app_tim.c and app_timer.c? Which timers are low power timers? Which ones are not?
- 2. Using Timer/Dual Timer timing, test the timing accuracy by flipping the IO in interrupt, and found the error is relatively large, what is the reason?
- 3. Using Timer/Dual Timer timing, test the timing accuracy by flipping the IO in the interrupt, and found that the error of the first cycle is very large, and the later cycles meet the requirement, what is the reason?
- FAQ for RTC
- FAQ for WDT
- FAQ for GPTimer
- UART
- USB
- X-QSPI
- I/O
- FAQ for BLE
- FAQ for Tools
- Build Tools
- Usage of J-Link RTT
- Building Goodix BLE Development Environment Based on VSCode
- FAQ for Ellisys
- 1. How to judge the signal quality of air interface packets? How to improve the quality of captured packets?
- 2. When I capture packets, I can only capture a small portion of the packet, and the packet capture device and software are running normally, but there are no more packets after that, what’s wrong?
- 3. I can only catch classic broadcasts, but not extended broadcasts, what’s wrong?
- 4. The program is running and I can see the broadcast packets on the packet grabber, but I can’t scan the device through the cell phone tool or the probability of connecting to the device is very low after I found the device, what’s the problem?
- 5. How does a packet grabber pull signals from a program while grabbing empty packets?
- 6. Why some encrypted packets can be decrypted while others cannot?
- 7. What is the problem that the packet grabber is running very slow?
- 8. After a long time of packet capturing, the packet capturing software is very laggy and fills up our system disk, what should I do?
- 9. How to check the current broadcast period or connection period by empty packets, so as to check that our code is configured as expected?
- 10. I want to make sure that my broadcast data is set up correctly, or I want to make sure that the connection data is sent out, where should I look at the sent out air port data?
- Graphics Tools
- Product Line Tools
- FAQ for GRPLT
- 1. What is the principle of crystal calibration?
- 2. What is the RSSI test method?
- 3. Where is the.bin file for the new version of the online tool (after V1.5.0.0.4)?
- 4. When do we need secondary development?
- 5. How is custom encryption different from Goodix encryption?
- 6. Report 0x1A badness (test firmware operation failure), what is the possible reason?
- 7. The online tool reports 0xFC fault (test firmware download fails). What is the possible reason?
- 8. 0x10 badness (abnormal crystal calibration) is reported. What is the possible reason?
- 9. Report 0x 12 error (abnormal burning), what is the possible reason?
- 10. After starting the GRPLT, when connecting the DUT, clicking “Start” does not respond. What is the possible reason?
- 11. After opening GRPLT, 16 small windows are not displayed. What may be the reason?
- FAQ for GRPLT Lite
- 1. What is the principle of crystal calibration?
- 2. What is the RSSI test method?
- 3. How is custom encryption different from Goodix encryption?
- 4. Test Firmware failed to run (0x39), what could be the cause?
- 5. Test firmware download failed (0x37, 0x38), what could be the cause?
- 6. Crystal calibration exception (0x3A, 0x3B, 0x3C), what could be the cause?
- 7. How to solve the time-consuming problem of port self-starting test?
- FAQ for GRPLT
- Build Tools
- FAQ for Hardware
- FAQ for ESD
- FAQ for RF
- 1. Can the PI circuit for RF be simplified or removed?
- 2. How does GR551x extend PA or FEM to improve transmission distance?
- 3. What are the reasons for the low conducted sensitivity and transmit power of the GR5xx?
- 4. Why are there two first matching capacitors in the GR5331/GR5330 series?
- 5. Why are there small pF capacitors on the GR533x series VBAT _ RF and GPIO0/1?
- 6. What about the poor modulation characteristics of GR533x series?
- 7. What is the reason why the GR533x SK board power or sensitivity cannot be matched to the GR533x different PCB boards using reference design matching parameters?
- FAQ for Minimum System
- 1. DC-DC 2.2 μH Inductor Selection Requirements?
- 2. Why does the peripheral interrupt need to access the IO of the AON domain?
- 3. Can the 32 K external crystal be omitted?
- 4. How to simplify BOM when GR533x is powered only in SYSLDO mode?
- 5. Does a 32m, 32.768K crystal require additional external load capacitance?
- 6. Can the 2.2 μH inductor of the DCDC be replaced with another inductor value?
- 7. Can the output capacitance of DCDC be increased?
- 8. What should we pay attention to in DCDC Layout?
- 9. What does RF Layout need to pay attention to?
- 10. What should I pay attention to when measuring high-speed signal waveforms such as QSPI?
- 11. Why can’t some active probes detect the signal transformation of RTC clock signal?
- 12. What are the 32m, 32.768K crystal PCB Layout requirements?
- 13. What are the PCB Layout requirements for high-speed signals such as QSPI?
- 14. Why is the power consumption during sleep high?
- 15. Are there any precautions when using an external PA?
- 16. What are the requirements for the LDO power chip when the GR5xx is powered by an LDO?
- FAQ for Business