Low power consumption

1. Basic Function Introduction

• GR5xx chip supports the following four power consumption modes:

  • Active: CPU is in full speed running state. MCU subsystem (including ARM processor, SRAM and peripherals, etc.) is always ready or working; Bluetooth subsystem (including RF transceiver, communication kernel, etc.) is always ready or working; PMU subsystem (including DC-DC, LDO, RTC, etc.) is always working.

  • IDLE: CPU is in idle state, not running any program.

  • Sleep: HFXO_32M clock stops running, MCU subsystems (except Retention SRAM) and Bluetooth subsystems are in a power-off state, and only the power of Always-on (AON) module is turned on to ensure that the data stored in the Retention SRAM is not lost, and at the same time, the power supply for the modules with wake-up functions (such as the Bluetooth LE Timer, Sleep Timer, Real Time Calendar, AON GPIO).

  • Ultra Deep Sleep: A special Sleep mode. In this mode, all modules (including Retention SRAM) are powered off, except for the Always-on (AON) module, which is powered on. After waking up via the AON GPIO or Sleep Timer, the program will perform a cold start process.

• Typical GR5xx low-power values are as follows (see the corresponding chip Datasheet for more details):

SoC	Seep Current (μA)	Ultra Deep Sleep Current (μA)
GR551x	2.7 (256 KB SRAM retention)	1.8
GR5525	7.3 (256 KB SRAM retention)	5.0
GR5526	3.3 (128 KB SRAM retention)	2.4
GR533x	2.6 (48 KB SRAM retention)	1.9

2. Application Notes

• Power consumption mode selection:

  • Generally it is sufficient to select Sleep mode, i.e. pwr_mgmt_mode_set(PMR_MGMT_SLEEP_MODE), which can take care of both sleep power consumption and wake-up time.

  • If the sleep time is long (e.g. one day) and the low power consumption requirement is high, you can choose an appropriate sleep mode according to the energy consumption, because although Ultra Deep Sleep sleeps with lower power consumption than the Sleep mode, it takes longer to wake up and performs a cold boot process.

• Low Power Code Configuration

  • Sleep low power mode code configuration:

    • Call pwr_mgmt_mode_set(PMR_MGMT_SLEEP_MODE) during code initialization to set Sleep low power mode.

    • In bare metal (no RTOS) development, you need to call pwr_mgmt_schedule in the main loop, and the system will enter Sleep mode when the conditions are met (e.g., the peripherals are all Idle, and there is nothing that the MCU and Bluetooth LE need to do).

    // Loop
    while (1)
    {
        app_log_flush();
        pwr_mgmt_schedule();
    }
    

    • In RTOS development environments that borrow the low-power mechanism of RTOS, such as FreeRTOS, when the system Idle is greater than or equal to 5 ms, at that point the system configures the time to sleep and then goes to sleep. When FreeRTOS needs to do something, the system is woken up by Sleep Timer, then the context is restored, and then FreeRTOS proceeds to work, and the whole process is senseless to the customer.

    TINY_RAM_SECTION void vPortEnterDeepSleep(TickType_t xExpectedIdleTime)
    {
        s_rtos_idle_ticks = xExpectedIdleTime;
        if (xExpectedIdleTime < 5)
        {
            ultra_wfi();
            return; }
        }
        if (PMR_MGMT_SLEEP_MODE ! = pwr_mgmt_mode_get())
        {
            ultra_wfi(); }
            return; }
        }
    
        pwr_mgmt_enter_sleep_with_cond(xExpectedIdleTime);
    }
    

  • Ultra Deep Sleep code configuration:

    • Customer can call void pwr_mgmt_ultra_sleep(uint32_t time_ms) to enter Ultra Deep Sleep mode. time_ms represents the time of sleep in ms, if it is equal to 0, at this time, it can only be woken up by the AON GPIO, and not by the Sleep Timer timer. If 0, the device can only be woken up by AON GPIO, but not by Sleep Timer.

• Power Measurement: SK can be used to do power evaluation, the power measurement method of each chip SK is different, you can refer to the SK power measurement document of the specific chip, such as the power measurement method of GR551x SK, you can refer to the GR551x Power Mode and Power Measurement Explanation .

• Whether the chip is sleep detection:

  • You can measure the chip current, if it is μA level, the chip is definitely sleeping.

  • Measure the DCDC/DIGCORE voltage, if the chip is not asleep, DCDC is around 1.1 V (the voltage of different chips varies slightly), DIGCORE is around 1.0 V (the voltage of different chips varies slightly).

• Although the chip has gone to sleep, the current measured at this time is on the high side, you can start from the following directions:

  • Whether the peripherals that do not need to work after sleep have all been turned off.

  • Is the IO level matching after sleep? IO level mismatch may cause IO leakage, refer to GR551x Power Mode and Power Measurement Explanation.

• APP layer Driver (e.g. app_i2c) realizes the management of low power consumption of peripherals (after sleep and wake-up, it can be used normally without calling de_init and init of the corresponding module), and the SoC will back up and restore the peripheral registers when it sleeps, and the HAL/LL layer Driver (e.g. hal_i2c and ll_i2c) doesn’t realize the management of low power consumption of peripherals, and the user needs to manage the peripheral level by himself. HAL/LL layer drivers (such as hal_i2c and ll_i2c) do not realize low-power management of peripherals. It is recommended to use the APP layer Driver to avoid the development workload introduced by the customer’s own low-power management of peripherals.

• After sleep, RTC/Calendar/BLE Timer/Sleep Timer can wake up the system, but tim and dual_tim cannot wake up the system.

• If the customer uses AON WDT (which also works during sleep), this is a good time to consider the dog feed time, otherwise the dog feed time may be missed, resulting in a system reset.

• J-Link will disconnect after the system sleeps.