SPI and QSPI

• Topic for SPI and QSPI
  • 01. SPI-QSPI Protocol Special Topic (1) - Introduction to Basic Protocol Features
    • 1. SPI Protocol
      • 1.1 Pin Signals
      • 1.2 Roles
      • 1.3 Clock Frequency
      • 1.4 Clock Modes
      • 1.5 Timing Phase
      • 1.6 SPI Protocol Derived Timing
    • QSPI Protocol
      • 2.1 Overview
      • 2.2 Pin Signals
      • 2.3 Timing Phase
      • 2.4 Instruction Addressing Mode
      • 2.5 QPI Modes
      • 2.6 SIOO Modes
      • 2.7 Efficiency Calculation
  • 02. SPI-QSPI Protocol Special Topic (2) - Fundamentals of Building GR55xx (Q)SPI High-Speed Transmission Interface
    • 1. Basic Application Background Supplement
      • 1.1 System Master and Slave
      • 1.2 Synchronous and Asynchronous Access
    • 2. Data Transmission Behavior
      • 2.1 Writing Data from CPU to Screen via QSPI
      • 2.2 Writing Data via DMA Directly to Screen through QSPI
      • 2.3 Reservoir Problem in Transmission (Producer & Consumer Problem)
  • 03. SPI-QSPI Protocol Special Topic (3) - GR552x Chip’s DMA and QSPI Module Features
    • 1. Typical DMA Features
      • 1.1 Typical DMA Applications
        • 1.1.1 DMA Base Data Transmission
        • 1.1.2 DMA Chain Data Transmission
        • 1.1.3 DMA Scatter Transmission
        • 1.1.4 DMA Gather Transmission
        • 1.1.5 DMA Scatter and Gather Transmission
      • 1.2 Features of DMA Transmission Channel
    • 2. Typical QSPI Features
      • 2.1 QSPI Working Modes
      • 2.2 QSPI Data Endian
        • 2.2.1 Data Endian in Write Operations
        • 2.2.2 Data Endian in Read Operations 2.2.2
        • 2.2.3 Read Rule for Static Data Endian in Memory Mapping Mode
        • 2.2.4 Read Rule for Dynamic Data Endian in Memory Mapped Mode 2.2.4
  • 04. SPI-QSPI Protocol Special Topic (4) - Color Formats and Common Exceptions
    • 1. Screen Color Format
      • 1.1 Common Color Code Formats
      • 1.2 Color Code Format Storage and Usage
    • 2. Analysis of Possible Causes of Out-of-Order Execution
      • 2.1 Inconsistent Read/Write Width of External Flash Leading to Reversal
      • 2.2 Abnormal Byte Order Configuration in Memory Mapped Read of External Flash
      • 2.3 Out-of-Order Due to Unaligned Address in DMA Access
    • 3. Common Display Issues
• SPI Application Notes
  • 1. Introduction to Basic Functions
  • 2. Application Notes
• QSPI Application Notes
  • 1. Basic Function Introduction
  • 2. Application Notes
  • 3. Typical Application Scenarios
    • 3.1 GR5526 supports the use of external flash as firmware cache for OTA upgrade.